Each new generation of integrated circuit (IC) continues to provide greater processing performance than the generation before. Part of the increase in performance is due to the reduction in geometries of semiconductor devices. In general, smaller semiconductor devices operate faster than larger semiconductor devices. Further, reduction in semiconductor device size reduces interconnect delays within the IC. As an illustrative example, a circuit design running at a certain frequency on an IC fabricated using a 28 nm technology process is able to operate faster, e.g., at a higher clock frequency, on an IC fabricated using a 16 nm technology process and even faster on an IC fabricated using a 7 nm technology process.
To implement a circuit design using a target IC fabricated using a different technology process, circuit designers are tasked with manually changing the micro-architecture of the circuit design to better operate on the target IC. Adjusting the micro-architecture of the circuit design is a time-consuming and burdensome process.